.\"   $Id: cougar.1,v 1.2 2002/10/09 20:12:42 xtof Exp $
.\" @(#)lynx 1.09 94/10/10 UPMC/ASIM/LIP6/CAO-VLSI " Ludovic Jacomme, Frederic Petrot
.TH COUGAR 1 "October 1, 1997" "ASIM/LIP6" "ALLIANCE USER COMMANDS"
.SH NAME
cougar \- Hierarchical netlist extractor
.SH SYNOPSIS
.B cougar
[
.I \-v
]
[
.I \-c
]
[
.I \-f
]
[
.I \-t
]
[
.I \-ar
]
[
.I \-ac
]
.I input_name
[
.I output_name
]
.br
.so man1/alc_origin.1
.SH DESCRIPTION
\fBLynx\fP changed its name to \fBCougar\fP during May 2002 in order to avoid name conflict with the famous text-mode Web browser.
\fBCougar\fP is a hierarchical layout extractor.
It builds a netlist of interconnections from a symbolic layout view.
The \fIinput\fP argument is the name of the symbolic layout cell to
be extracted, using as input format the one selected by the
\fBMBK_IN_PH\fP(1) environment variable.
If \fIoutput\fP is present, the resulting netlist will be given this name.
If no \fIoutput\fP is given, then \fIinput\fP will also be the generated
netlist name.
The output format is specified by the \fBMBK_OUT_LO\fP(1) environment variable.
.br
As most of the Alliance cad tools, \fBcougar\fP uses \fBmbk\fP(1) environment
variables.
.BR MBK_CATA_LIB (1),
.BR MBK_WORK_LIB (1),
.BR MBK_IN_PH (1),
.BR MBK_OUT_LO (1),
.BR RDS_TECHNO_NAME (1).
.PP
\fBCougar\fP computes capacitances attached to the signals if 
the -ac option is set. At the moment,
the value of these capacitances is computed for a typical one micron
technology, and cannot be changed by the user through a technology file.
The extracted netlist can be simulated for performance evaluation.
.br
The typical capacitances are given below in 10e-18 farad / lamda^2 :
.TP 20
POLY
100
.TP 20
ALU1
50
.TP 20
ALU2
25
.SH OPTIONS
\fBCougar\fP checks the two basic \fBALLIANCE\fP rules regarding connector names:
.br
.RS
If two physical connectors are connected to the same net, they must have
the same name. 
.br
If two physical connectors have the same name, they must be internally
connected to the same net.
.RE
.br
As a result only one logical connector will appear in the netlist.
A fatal error occurs if one of those two rules is violated ( even for power
and ground connectors )

When no options are specified, the current hierarchical level is extracted.
The resulting netlist is the list of interconnections of the current
layout hierarchy level.
Three options are available to change \fBcougar\fP behaviour :
.TP
\-t
Notifies a transistor level extraction, the symbolic layout cell is flattened to
transistor layout before extraction.
.TP
\-f
The symbolic layout cell is flattened to the catalog level before extraction.
Use "man catal" for detail on  the  catalog file.
If the catalog is empty, or doesn't exist, the netlist is an interconection of
transistors, if  it isn't, the netlist is an interconection of gates or blocks
whose names are defined in the catalog.
.TP
\-v
Verbose mode on.
Each step of the extraction is displayed on the standard  output,
along  with some statistics.
.TP
\-c
Generates a \fBcore\fP file representing the conflictuel net, when 
\fBcougar\fP detects two external connectors with different names on
the same signal, or when it finds two external connectors having 
the same name but not internally connected to the same net, or when 
it cannot correctly extract an L shaped transistor.
.TP
\-ac
Extract capacitance to ground on losig.
.TP
\-ar
Extract interconnect resistance and capacitance to ground. Value of
resistance foreach layer can be changed in the RDS file.
.SH EXAMPLES
.ie t  \{\
.ft CR \}
.el \fB
prompt> cougar -v amd2901
.ft R
.RS
Gives a logical netlist of the chip amd2901, for one hierarchical
level, using verbose mode.
This would be typically used to verify the work of the \fBring\fP(1)
router, in conjunction with \fBlvx\fP on the specificated netlist and
the extracted one.
.RE
.ie t  \{\
.ft CR \}
.el \fB
.nf
prompt> cat $MBK_WORK_LIB/$MBK_CATAL_NAME
a2_y
a2p_y
 .
 .
prompt> cougar -f amd2901
.fi
.ft R
.RS
Gives a logical netlist of the chip amd2901, after a flatten operation stopping
on the cells specified in the catalog ( the standard cell library in our case ).
.RE
.ie t  \{\
.ft CR \}
.el \fB
.nf
prompt> cougar -t amd2901
.fi
.ft R
.RS
Gives a logical netlist of the amd2901 chip at the transistor level.
This is useful with \fByagle\fP(1), to retrieve logical equations from
a layout.
.RE
.SH SEE ALSO
.BR al (5),
.BR MBK_CATA_LIB (1),
.BR MBK_WORK_LIB (1),
.BR MBK_CATAL_NAME (1),
.BR MBK_IN_PH (1),
.BR catal (5),
.BR RDS_TECHNO_NAME (1).

.so man1/alc_bug_report.1

